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11篇 您的检索式:作者名="HISAMOTO D"
    题名 作者 年代 出处 被引量
1Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate显示文摘SUGII N HISAMOTO D WASHIO K 2002IEEE Trans Elec Dev2002,49,12:1
2FinFET--a self-aligned double-gate MOSFET scalable to 20 nm 显示文摘HISAMOTO D LEE W C KEDZIERSKI J 2000IEEE Trans Electron Dev2000,47,12:1
3FinFET a self-aligned double-gate MOSFET scalable to 20 nm 显示文摘HISAMOTO D LEE W C KEDZIERSKI J 2000IEEE Transactions on Electron Devices2000,47,12:1
4FinFET-a self-aligned double-gate MOSFET scalable to 20 nm显示文摘Hisamoto D Lee W C Kedzierski J 2000IEEE Transactions on Electron Devices2000,47,12:1
5Performance en- hancement of strained - Si MOSFETs fabricated on a chemical - mechanical - polished SiGe substrate 显示文摘Sugii N Hisamoto D Washio K 2002IEEE Transactions on Electron Devices2002,49,12:1
6FinFET-- a self-aligned double-gate MOSFET scalable to 20 nm 显示文摘HISAMOTO D LEE W C KEDZIERSKI J 2000IEEE Transactions on Electron Devices2000,47,12:1
7Performance en hancement of strained-Si MOSFETs fabricated on a chemi cal-mechanical-polished SiGe substrate显示文摘Sugii N Hisamoto D Washio K 2002IEEE Trans E lectron Devices2002,49,12:1
8Impact of the verti cal SOI 'DELTA' structure on planar device technolo gy 显示文摘 Kaga T Takeda E 1991IEEE Trans Elec Dev1991,38,6:1
9Impact of the vertical SOI 'DELTA' structure on planar device technology 显示文摘Hisamoto D Kaga T Takeda E 1991IEEE Trans Elee Dev1991,38,6:1
10FinFET-a self-aligned double-gate MOSFET scalable to 20 nm显示文摘HISAMOTO D LEE W C KEDZIERSKI J 0,,12:1
11FinFET-a self-aligned double-gate MOSFET scalable to 2011m显示文摘Hisamoto D Lee W Kedzierski J 2000IEEE Transactions on Electron Devices2000,47,12:1
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