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| 1 | The Variables and Invariants in the Evolution of Logic Optical Lithography Process显示文摘Photolithography has been a major enabler for the continuous shrink of the semiconductor manufacturing design rules.Throughout the years of the development of the photolithography,many new technologies have been invented and successfully implemented,such as image projection lithography,chemically amplified photoresist,phase shifting mask,optical proximity modeling and correction,etc.From 0.25μm technology to the current 7 nm technology,the linewidth has been shrunk from 250 nm to about 20 nm,or 12.5 times.Although imaging resolution is proportional to the illumination wavelength,with the new technologies,the wavelength has only been shrunk from 248 nm to 134.7 nm(193 nm immersion in water),less than 2 times.Would it mean that the imaging performance has been continuously declining?Or we have yet fully utilized the potential of the photolithography technology?In this paper,we will present a study on the key parameters and process window performance of the image projection photolithography from 0.25μm node to the current 7 nm node. | Qiang Wu | 2019 | Journal of Microelectronic Manufacturing2019，2，1： | 2 |
| 2 | Modified Postannealing of the Ge Condensation Process for Better-strained Si Material and Devices 显示文摘 | Liu X Y Ma X B Du X F | 2010 | Journal of Vacuum Science & Technology B : Microelectronics and Nanometer Structures2010，28，5： | 1 |
| 3 | EUV Lithography: State-of-the-Art Review显示文摘Although several years delayed than its initial plan, extreme UV lithography (EUVL) with 13.5nm wavelength has been finally implemented into high volume manufacture (HVM) of mainstream semiconductor industry since 2018. With the delivery and installation of ASML EUV scanners in those giant Fab players like Samsung, TSMC and Intel, EUV lithography is becoming a sort of industry standard exposure metrology for those critical layers of advanced technology nodes beyond 7nm. Although ASML NXE EUVL scanner is the only commercialized EUV exposure system available on the market, its development is the concentration of all essence from worldwide industrial and academic collaboration. It is becoming more and more important not only for fab runners but also for main stream fabless design houses to understand and participate the progress of EUVL. In this review, working principles, module structures and technical challenges have been briefly discussed regarding each EUV subsystem, including light source, reflection mirrors and system, reticle module as well as photoresist development. EUV specific issues of light intensity, defectivity within reflection system, line edge roughness (LER) and mask 3D effects have been focused respectively and promising solutions have been summarized as well. | Nan Fu Yanxiang Liu Xiaolong Ma Zanfeng Chen | 2019 | Journal of Microelectronic Manufacturing2019，2，2： | 1 |
| 4 | Fabrication of thickness-controlled silicon nanowires and their characteristics 显示文摘 | NAMATSU H TAKAHASHI Y NAGASE M | 1995 | Journal of Vacuum Science Technology B: Microelectronics and Nanometer Structures1995，13，6： | 1 |
| 5 | Poly- crystalline silicon 'slit nanowire' for possible quan- tum devices显示文摘 | WADA Y KURE T YOSHIMURA T | 1994 | Journal of Vacuum Science *Tech- nology B: Microelectronics and Nanometer Struc- tures1994，12，1： | 1 |
| 6 | Design of a narrow band hairpin filter on PTEE laminate显示文摘 | Salarnat C D Lorenzo M A D Roxas E J B | 2002 | Philippine Journal of ICT & Microelectronics2002，1，2： | 1 |
| 7 | GaN, AlN, and InN: A review 显示文摘 | STRITE S MORKOC H | 1992 | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures1992，10，4： | 1 |
| 8 | Nanobubbles on solid surface imaged by atomic force microscopy显示文摘 | Lou S T Ouyang Z Q Zhang Y | 2000 | Journal of Vacuum Science and Technology B : Microelectronics and Nanometer Structures2000，18，5： | 1 |
| 9 | Silicon Nitride Etch via Oxidation Reaction in Fluorocarbon/Oxygen Plasma:A First-Principle Study显示文摘Conducting all-in-one etch process for 3D-NAND fabrication requires close etch rate(E/R)for SiO2 and Si3N4;however,to attain comparable and high etch rate for both materials is challenging.In this work,we performed first-principle studies on the etching mechanism of Si3N4 in fluorocarbon/oxygen plasma.The feasibility of using fluorocarbon/oxygen plasma to etch Si3N4 while attaining close E/R to SiO2 through the complementary nitride to oxynitiride(SiOxNy)transformation has been identified.Such transformation involves two stages:N atom elimination and Si-O bond formation.By modeling the essential chemical reactions on the Si3N4 surface,we shed light upon the underlying mechanisms behind both stages.We simulated the N-elimination reactions involving the formation and desorption of NO and FNO molecules as well as the substitution with F atoms.We found that N atoms can be eliminated by forming NO molecules,especially with the assistance of F-substitution in Si-N bond breaking.The predicted O-additive energies indicates that forming SiOxNy structure after N-elimination is possible.Following that,the dependency of chemistries favoring either high E/R or active SiOxNy formation on the fluorocarbon/oxygen ratio was discussed.We hope that the work will build a foundation for future studies on pursuing all-in-one ON etch process via the surface modifications. | Yu-Hao Tsai Du Zhang Mingmei Wang | 2018 | Journal of Microelectronic Manufacturing2018，1，1： | 1 |
| 10 | Oxidation sharpening of silicon tips显示文摘 | RAVI T S MARCUS R B LIU D | 1991 | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures1991，9，6： | 1 |
| 11 | High resolution electron beam lithography using a chemically amplified calix arene based resist 显示文摘 | Sailer H Ruderisch A Henschel W | 2004 | Journal of Vacuum Science and Technology B : Microelectronics and Nanometer Structures2004，22，6： | 1 |
| 12 | Synthesis and modification of red oxide phosphors for low voltage excitation显示文摘 | Gwak J-H Park S H Jang J E | 2000 | Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures2000，18，： | 1 |
| 13 | Application of 4-methyl-1-acetoxycalix arene resist to complementary metal-oxide-semiconductor gate processing 显示文摘 | Rocks M J Aviram A | 1999 | Journal of Vacuum Science and Technology B : Microelectronics and Nanometer Structures1999，17，6： | 1 |
| 14 | Focused Ion Beam Technology and Applications显示文摘 | John M | 1987 | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures1987，5，2： | 1 |
| 15 | Bottom-up copper electroplating using transfer for fabrication of high aspect-ratio through-silicon vias显示文摘 | Song Chongshen Wang Zheyao Liu Litian | 2010 | Journal of Microelectronic Engineering2010，87，： | 1 |
| 16 | Fabrication of high aspect ratio structures for micro-channel plates 显示文摘 | Shank S M Soave R J Then A M | 1995 | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures (S0022-5355)1995，13，6： | 1 |
| 17 | Combined helium ion beam and nanoimprint lithography attains 4 nm half- pitch dense patterns显示文摘 | LI W D WU W WILLIAMS R S | 2012 | Journal of Vacuum Science & Technology B Microelectronics & Nanometer Structures2012，30，6： | 1 |
| 18 | Fourier transform infrared study of porous silicon dipped into Cr^3+ solution 显示文摘 | HUANG Y M ZHAI B G | 1997 | Journal of Vacuum Science and Tecknology B ( Microelectronics and Nanometer Structures)1997，15，6： | 1 |
| 19 | Optical focus and level sensor for wafer steppers显示文摘 | Van Der Werf J E | 1992 | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures1992，10，2： | 1 |
| 20 | FinFET Performance Enhancement by Source/Drain Cavity Structure Optimization显示文摘Fin field-effect transistor(FinFET)technology has been introduced to the mainstream complementary metal-oxide semiconductor(CMOS)manufacturing for low-power and highperformance applications.However,advanced FinFET nodes are facing significant challenges to enhance the device performance due to the increasingly prominent parasitic resistance and capacitance.In this study,for the first time,we demonstrate methods of enhancing p-channel FinFET(pFET)performance on a fully integrated advanced FinFET platform via source/drain(S/D)cavity structure optimization.By modulating the cavity depth and proximity around the optimal reference point,we show that the trade-off between the S/D resistance and short channel effect,as well as the impact on the parasitic capacitance must be considered for the S/D cavity structure optimization.An extra process knob of applying cavity implant on the desired cavity structure was also demonstrated to modify the S/D junction profile for device performance enhancement. | Man Gu Wenjun Li Haiting Wang Owen Hu | 2020 | Journal of Microelectronic Manufacturing2020，3，2： | 1 |
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