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845篇 您的检索式：期刊名="Computer Design"

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	题名	作者	年代	出处	被引量
1	Characterization and testing of physical failures in MOS logic circuits显示文摘	Banerjee P Abraham J	1984	IEEE Design and Test of Computers1984，1，8：	3
2	A Model and Methodology for Hardware-software Codesign显示文摘	Donald E T Jay K A Herman S	1993	IEEE Design & Test of Computers1993，10，3：	2
3	Inductive fault analysis of MOS integrated circuits显示文摘	Shen J Maly W Ferguson F	1985	IEEE Design and Test of Computers1985，2，12：	2
4	lntra-Task Voltage Scheduling for Low-Energy Hard Real-Time Applieations显示文摘	Shin D Kim J Lee S	2001	IEEE Design and Test of Computers2001，18，2：	1
5	Fast template placement for reconfigurable computing systems显示文摘	Bazargan K Kastner R Sarrafzadeh M	2000	IEEE Design and Test of Computers2000，7，1：	1
6	Dynamic Power Management in wireless sensor networks显示文摘	Sinha A Chandrakasan A Mic C	2001	IEEE Design & Test of computers2001，18，2：	1
7	COSI: A Framework for the Design of Interconneetion Networks显示文摘	Pinto A	2008	Design & Test of Computers2008，25，5：	1
8	Xmas: quick formal modeling of communication fabrics to enable verification显示文摘	CHATTERJEE S KISHINEVSKY M OGRAS U	2012	Design Test of Computers IEEE2012，29，3：	1
9	Survey of test vector compression techniques显示文摘	Touba N A	2006	Design & Test of Computers2006，23，4：	1
10	Reverse engineering of geometric modelsan introduction显示文摘	VARADY T MARTIN R R COX J	1997	Comput Aidded Design1997，29，4：	1
11	The Thereal Network on Chip: Concepts, Architectures, and Implementations显示文摘	Goossens K Dielissen J Radulescu A	2005	IEEE Design and Test of Computers2005，22，5：	1
12	Survey of Test Vector Compression Techniques 显示文摘	Touba N	2006	IEEE Design & Test of Computers2006，23，4：	1
13	Compiler De sign Issues for Embedded Processors 显示文摘	Leupers R	2002	IEEE Design and Test of Computers2002，19，4：	1
14	Geometric constraint satisfaction using optimization methods显示文摘	Ge J Chou S C Gao X	2000	Compute Aided Design2000，31，14：	1
15	Study on kansei engineering and its application to product design 显示文摘	YANG M JIA L	2009	Computational Intelligence and Design2009，，12：	1
16	Guide surface based tool path generation in 3- axis mill: an extension of the guide plane method显示文摘	Kim B H Choi B K	2000	Compute Aided Design2000，32，3：	1
17	High-level modeling and design of asynchronous interface logic显示文摘	A V Yakovlev A M Koelmans L Lavagno	1995	IEEE Design and Test of Computers1995，1995，：	1
18	Dag-map: graph-based FPGA technology mapping for delay optimization 显示文摘	Chen K C Cong J Ding Y	1992	IEEE Design & Test of Computers1992，9，3：	1
19	Incremental verification with error detection, diagnosis, and visualization显示文摘	CHANG K H PAPA D MARKOV I	2009	Design Test of Computers IEEE2009，26，2：	1
20	Manufacture of a spur tooth gear in Ti-6A1-4V alloy by electrical dis- charge显示文摘	Tal6n J L H Ortega J C C G6mez C L		Comput er-Aided Design0，42，3：	1

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