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39篇 您的检索式:作者名="OGRAS U"
    题名 作者 年代 出处 被引量
1Xmas: quick formal modeling of communication fabrics to enable verification显示文摘CHATTERJEE S KISHINEVSKY M OGRAS U 2012Design Test of Computers IEEE2012,29,3:1
2Energy and performance aware incremental mapping for network on chip with multiple voltage levels 显示文摘Chou C Ogras U Marculescu R 2008IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems2008,27,10:1
3System-level buffer allocation for application specific networks on chip router design显示文摘Hu Jingcao Ogras U Y Marculescu R 2006IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems2006,25,3:1
4System-level buffer allocation for application-specific networks-on-chip routerdesign 显示文摘Hu J Ogras U Y Marculeseu R 2006IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2006,25,12:1
5System-levelbuffer allocation for application specific networks onchip router design 显示文摘Hu J ingcao Ogras U Y Marculescu R 2006IEEE Transactions on Computer Aided Design of Integrated Circuit s and Systems2006,25,3:1
6Computation and communication refinement for multiprocessor SoC design:a systemlevel perspective显示文摘MARCULESCU R OGRAS U Y ZAMORA N H 2006ACM Trans on Design Automation of Electronic Systems2006,11,3:1
7System-level buffer allocation for application-specific networks-on-chip router design显示文摘Hu J Ogras U Y Marculescu R 2006IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems2006,25,3:1
8On-chip communication architecture exploration: a quantitative evaluation of point-to-point, bus and network-on-chip approaches显示文摘LEE H G CHANG N OGRAS U Y 2007ACM Transactions on Design Automation of Electronic Systems2007,12,3:1
9Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives 显示文摘Marculescu R Ogras U ~ Peh L S 2009IEEE Transctions on Computer-Aided Design of Integrated Circuits and Systems2009,28,1:1
10Energy-and performance-aware incremental mapping for networks on chip with multiple voltage levels显示文摘Chou C L Ogras U Y Mareulescu R 2008IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems2008,27,10:1
11Energy- and Performance-Aware Incremental Mapping for Networks on Chip with Mlutiple Voltage Levels显示文摘Chou C L Ogras U Y Marculescu R 2008IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems2008,27,10:1
12Dimensionality reduction and similarity computation by inner-product approximations显示文摘EGECIOGLU O FERHATOSMANOGLU H OGRAS U 2004IEEE Transactions on Knowledge and Data Engineering2004,16,6:1
13De- sign and management of voltage-frequency island parti- tioned networks-on-chip 显示文摘Ogras U Y Marculescu R Marculescu D 2009IEEE Transactions on Very Large Scale Integration Systems2009,17,3:1
14Outstanding research problems in No C design:system,micro-architecture,and circuit perspectives显示文摘MARCULESCU R OGRAS U Y PEH L S 2009IEEE Transactions on Computeraided Design of Integrated and Systems2009,28,1:1
15On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches显示文摘LFF H G CHANG H OGRAS U Y 2007ACM Transactions on Design Automation of Electronic Systems2007,12,3:1
16On-Chip communication architecture exploration:A quantitative evaluation of point- to-polnt,bus,and network-on-chlp approaches显示文摘Lee Hyung Gyu Chang Naehyuck Ogras U Y 2007ACM Transactions on Design Automation of Electronic Systems2007,12,3:1
17On-chipcommunication architecture exploration:Aquantitative evaluation of point-to-point,bus,andnetwork-on-chip approaches显示文摘LEE H G CHANG N OGRAS U Y 2007ACM Transactionson Design Automation of Electronic Systems2007,12,3:1
18Design and management of voltage-frequency island partitioned networks -on-chip显示文摘Ogras U Y Marculescu R Marculescu D 2009IEEE Transactions on Very Large Scale Integration ( VLSI) Systems2009,17,3:1
19Outstanding research problems in NoC design: System, microarchitecture, and circuit perspectives 显示文摘Marculescu R Ogras U Y Peh L-S 2009IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems2009,28,1:1
20Energy-and performance-aware incremental mapping for networks on chip with multiple voltage levels显示文摘Chou C L Ogras U Y and Marculescu R 2008IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2008,27,10:1
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