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| 1 | A hardware -efficient multimate digital channelized receiver architecture显示文摘 | ZAHIRNIAK D R SHARPIN D L FIELDS T W | 1998 | IEEE Trans On AES1998，34，1： | 2 |
| 2 | A hardware- efficient, multirate, digital ehannelized receiver architecture 显示文摘 | Zahimiak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，1： | 1 |
| 3 | A hardware-effi- cient, multirate, digital channelized receiver architecture Aerospace and Electionic Systems显示文摘 | Zahimiak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace And Electronic Systems1998，34，1： | 1 |
| 4 | A Hardware-Efficient, Muhirate, Digital Channelized Receiver Architecture 显示文摘 | Zahimiak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，1： | 1 |
| 5 | A hardware efficient,multirate,digital channelized receiver architecture显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Trans Aerospace and Electronic Systems1998，34，1： | 1 |
| 6 | A hard- ware-efficient multimate, digital channelized receiver archi- tecture显示文摘 | ZAHIRNIAK D R SHARPIN D L FIELDS T W | 1998 | IEEE Trans on Aerospace and Electronic Sys- tems1998，34，1： | 1 |
| 7 | A hardware efficient, multirate, digital channelized receiver architecture显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Trans- actions on Aerospace and Electronic Systems1998，34，1： | 1 |
| 8 | A hardware -efficient multimate digital channelized receiver architecture显示文摘 | ZAHIRNIAK D R SHARPIN D L FIELDS T W | 1998 | IEEE Trans On AES1998，34，1： | 1 |
| 9 | A hardware - efficient, multirate, digital channel- ized receiver architecture 显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Transac- tions on Aerospace and Electronic Systems1998，34，： | 1 |
| 10 | A hardware-effi-cient multimate digital channelized receiver architecture 显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，1： | 1 |
| 11 | A Hardware-efficient Multimate Digital Channelized Receiver Architecture显示文摘 | D R Zahirniak D L Sharpin T W Fields | 1998 | IEEE Trans on Aes1998，34，1： | 1 |
| 12 | Analysis of linear amplifier/analog-digital convertor interface in a digital microwave receiver 显示文摘 | D L Sharpin J B Y Tsui | 1995 | IEEE Tran on AES (S0018-9251)1995，31，1： | 1 |
| 13 | A Hardware-Efficient, Multirate, Digital Channelized Receiver Architecture显示文摘 | ZAHIRNIAK D R SHARPIN D L FIELDS T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，01： | 1 |
| 14 | Hardware-efficient, multirate, digital channelized receiver architecture显示文摘 | Zahimiak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，： | 1 |
| 15 | Digital channelized IFM receiver显示文摘 | Field T W Sharpin D L Tsui J B Y | 1994 | IEEE Microwave Theory and Techniques Symposium Digest1994，3，： | 1 |
| 16 | A hardware efficient, multirate, digital channelized receiver architecture显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electron ic Systems1998，34，1： | 1 |
| 17 | A hardwareefficient multirate digital channelized receiver architecture 显示文摘 | ZAHIRNIAK R SHARPIN D L FIELDS T W | 1998 | IEEE Trans On AES1998，34，1： | 1 |
| 18 | A Hardware-efficient, Multirate, Digital Channelized Receiver Architecture 显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace and Electronic Systems1998，34，1： | 1 |
| 19 | A Hardware-efficient multimate digital channelized receiver architecture显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Trans on Aes1998，34，1： | 1 |
| 20 | A hardware-efficient,multirate,digital channelized receiver architecture Aerospace and Electronic Systems显示文摘 | Zahirniak D R Sharpin D L Fields T W | 1998 | IEEE Transactions on Aerospace And Electronic Systems1998，34，1： | 1 |
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