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96篇 您的检索式:期刊名="Trans VLSI Syst"
    题名 作者 年代 出处 被引量
1A scalable dual-clock FIFO for data transfers between arbitrary and haltable clock domains显示文摘APPERSON R W YU Z Y MEEUWSEN M J 2007IEEE Trans VLSI Syst2007,15,10:1
2Complex shaped on-wafer interconnects modeling for CMOS RFICs显示文摘SHI X K YEO S MA J G 2008IEEE Trans VLSI Syst2008,16,7:1
3Thermal-constrained task allocation for interconnect energy reduction in 3-I) homogeneous MPSoCs 显示文摘CHENG Y ZHANG L HAN Y 20131EEE Trans Very Large Scale Integr VLSI Syst2013,21,2:1
4A reconfigurable VLSI coprocessing system for the block matching algorithm显示文摘 Yang W 1997IEEE Trans VLSI Syst1997,5,3:1
5Analysis and design of a low-voltage low-power double-tTail comparator 显示文摘BABAYAN-MASHHADI S LOTFI R 2014IEEE Trans VLSI Syst2014,22,2:1
6System design for pixel-parallel image processing 显示文摘 Herrmann F P Hsu L T 1996IEEE Trans VLSI Syst1996,4,1:1
7Stochastic physical synthesis considering prerouting interconnect uncertainty and process variation for FPGAs显示文摘LIN Y HE L HUTTON M 2008IEEE Trans VLSI Syst2008,16,2:1
8A CORDIC processor for FFT computation and its implementation using gallium arsenide technology显示文摘Sarmiento R 1998IEEE Trans VLSI Syst1998,6,1:1
9Design of a low-voltage low-dropout regulator显示文摘HUANG C H MA Y T LIAO W C 2014IEEE Trans VLSI Syst2014,22,6:1
10A novel wavelet transform-based transient current analysis for fault detection and localization显示文摘BHUNIA S ROY K 2005IEEE Trans VLSI Syst2005,13,4:1
11Simultaneous switch noise in on-chip CMOS distribution networks 显示文摘TANG K-T FRIEDMAN E-G 2002IEEE Trans VLSI Syst2002,10,4:1
12Low power encoding for ultra low power design显示文摘Stan M R Burlesson W P 1997IEEE Trans VLSI Syst1997,5,4:1
13Error-resilient motion estimation architecture显示文摘VARATKAR G V SHANBHAG N R 2008IEEE Trans VLSI Syst2008,16,10:1
14Wire sizing and spacing for lithographic printability and timing optimization显示文摘Cao K Hu J Cheng M 2007lEEE Trans on VLSI Syst2007,15,12:1
15Equivalent circuit model of on-wafer CMOS interconnects for RFICs显示文摘Shi X-M Ma J-G Yeo K S 2005IEEE Trans VLSI Syst2005,13,9:1
16A survey of design techniques for system-level dynamic power management显示文摘Benini L 2000IEEE Trans VLSI Syst2000,8,3:1
17Asub-1 V- 26 btW low output impedance bandgap reference with a low dropout or source follower mode 显示文摘NGDCW KWONGDKK WONGN 2011IEEE Trans VLSI Syst2011,19,7:1
18System-on-chip test scheduling with reconfigurable core wrappers 显示文摘ERIK L HIDEO F 2006IEEE Trans VLSI Syst2006,14,3:1
19Ant colony system application to macrocell overlap removal显示文摘 S Katkoori 2004IEEE Trans on Very Large Scale Integr (VLSI) Syst2004,12,10:1
20Predictive system shutdown and other architectural techniques for energy efficient programmable computation 显示文摘Srivastava M Chandrakasan A Brodersen R 1996IEEE Trans VLSI Syst1996,4,:1
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