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23篇 您的检索式：期刊名="IEEE Transactions on ComputerAided Design"

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	题名	作者	年代	出处	被引量
1	Performance analysis of embedded software using implicit path enumeration显示文摘	Li Y-T S Malik S	1997	IEEE Transactions on Computeraided Design of Integrated Circuits and Systems1997，16，12：	1
2	Simultaneous escape-routing algorithms for via minimization of high-speed boards显示文摘	OZDAL M M WONG M D F HONSINGER P S	2008	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2008，27，1：	1
3	Verification of tempura specification of sequential circuits显示文摘	Hira M Sarkar D	1997	IEEE Transactions on Computeraided Design of Integrated Circuits and Systems1997，16，4：	1
4	An SDRAM-aware router for networks-on-chip显示文摘	Jang W Pan D	2010	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2010，29，10：	1
5	DTT: Direct truncation of the transfer function-An alterative to moment matching for tree structured interconnect 显示文摘	Ismail Y I Friedman E G	2002	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2002，21，2：	1
6	Performance optimization using template mapping for datapath-intensive high-level synthesis 显示文摘	Corazao M R Khalaf M A Guerra L M	1996	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems1996，15，8：	1
7	An algorithm for synthesis of reversible logic circuits显示文摘	Gupta P Agrawal A Jha N K	2006	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2006，25，11：	1
8	Incremental and Verified Modeling of the PCI Express Protocol显示文摘	Bohm P	2010	IEEE Transactions on Computeraided Design of Integrated Circuits and Systems2010，29，10：	1
9	Bus matrix synthesis based on steiner graphs for power efficient systemon-chip communications显示文摘	Wang Renshen Zhang Yulei Chou Nan-Chi	2011	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2011，30，2：	1
10	Built-in-self-test of FPGAs with provable ingnosabilities and high diagnostic coverage with application to online testing显示文摘	Dutt S Verma V Suthar V	2008	IEEE Transactions on Computeraided Design of Integrated Circuits and Systems2008，27，6：	1
11	Outstanding research problems in No C design:system,micro-architecture,and circuit perspectives显示文摘	MARCULESCU R OGRAS U Y PEH L S	2009	IEEE Transactions on Computeraided Design of Integrated and Systems2009，28，1：	1
12	A provably passive and cost-efficient model for inductive interconnects 显示文摘	Yu H He L	2005	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems2005，24，8：	1
13	Using lower bounds during dynamic BDD minimization显示文摘	Gnther W Somenzi F	2001	IEEE Transactions on Computeraided Design of Integrated Circuits and Systems2001，20，1：	1
14	SOC-test pattern generation system 显示文摘	SCHULZ M TRISCHLER E SARRATES A highly efficient automatic FERT T	1988	IEEE Transactions on ComputerAided Design1988，7，：	1
15	On improving test quality of scan-based BIST 显示文摘	Tsai Huan-Chih Cheng Kwang-Ting Bhawmik S	2000	ComputerAided Design of Integrated Circuits and Systems IEEE Transactions on2000，19，8：	1
16	Efficient linear circuit analysis by Padé approximation via the lanczos process显示文摘	Feldmann P Freund R W	1995	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems1995，14，5：	1
17	Asymptotic waveform evaluation for timing analysis显示文摘	Pillage L T Rohrer R A	1990	IEEE Transactions on ComputerAided Design1990，9，4：	1
18	PRIMA: Passive reducedorder interconnect macromodeling algorithm显示文摘	Odabasioglu Altan Celik Mustafa Pileggi Lawrence T	1998	IEEE Transactions on ComputerAided Design1998，17，8：	1
19	Testing network-on-chip communication fabrics 显示文摘	GRECU C IVANOV A SALEH R	2007	IEEE transactions on computeraided design of integrated circuits and systems2007，26，12：	1
20	GLFSR-a new test pattern generator for built-in-self-test显示文摘	Pradhan D K Chatterjee M	1999	IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems1999，18，2：	1

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