维普期刊资源整合服务平台（V6.5）

163篇 您的检索式：期刊名="IEEE Trans VLSI Systems"

选中清除导出查看参考文献查看引证文献引用追踪共9页首页上一页第1页下一页末页 /9 跳转

	题名	作者	年代	出处	被引量
1	High-level synthesis of recoverable VLSI microarchitectures显示文摘	D M Blough F J Kurdahi Seong Yong Ohm	1999	IEEE Trans on VLSI Systems1999，7，4：	1
2	Low power digital systems based on adiabatic switching principles显示文摘	Svensson L Koller J	1994	IEEE Trans VLSI Systems1994，2，4：	1
3	Predictive system shutdown and other architectural techniques for energy efficient programmable computation显示文摘	Srivastava M Chandrakasan A Brodersen R	1996	IEEE Trans VLSI Systems1996，4，1：	1
4	A survey of design techniques for system-level dynamic power management 显示文摘	Benini L Bogliolo A Micheli G D	2000	IEEE Trans on Very Large Scale Integration (VLSI) Systems2000，8，3：	1
5	Predictive system shutdown and other architectural techniques for energy efficient programmable computation 显示文摘	Srivastava M B Chandrakasan A P Brodersen R W	1996	IEEE Trans on Very Large Scale Integration (VLSI) Systems1996，4，1：	1
6	The effect of LUT and cluster size on deep Submicron FPGA performance and density 显示文摘	Ahmed E Rose J	2004	IEEE Trans Very Large Scale Integration (VLSI)Systems2004，12，3：	1
7	True single-phase adiabatic circuitry显示文摘	Papaefthymioun M C	2001	IEEE Trans VLSI Systems2001，9，1：	1
8	Predictive system shutdown and other architectural techniques for energy efficient programmable computation 显示文摘	SRIVASTAVA M CHANDRAKASAN A BRODERSEN R	1996	IEEE Trans on VLSI Systems1996，，1：	1
9	Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding显示文摘	Lin C H Chen C Y Wu A Y	2011	IEEE Trans on VLSI Systems2011，19，2：	1
10	A survey of power estimation techniques in VLSI circuits显示文摘	F N Najm	1994	IEEE Trans on VLSI Systems1994，2，4：	1
11	A Monte-Carlo approach for power estimation显示文摘	R Burch F Najm	1993	IEEE Trans on VLSI Systems1993，1，1：	1
12	Using magnetic RAM to build low power and soft error-resilient L1 cache 显示文摘	Sun Hongbin Liu Chuanyin Xu Wei	2012	IEEE Trans on Very Large Scale Integration (VLSI) Systems2012，20，1：	1
13	A Fully Pipelined Architecture for The LOCO-I Compression Algrithm显示文摘	Merlino P Abramo A	2009	IEEE Trans on Very Large Scale Integration (VLSI) Systems2009，17，7：	1
14	An on-chip march pattern generator for testing embedded memory cores显示文摘	WANG Wei-Lun LEE Kuen-Jong WANG Jging-Fa	2001	IEEE Trans on VLSI Systems2001，9，5：	1
15	Small area parallel Chien search architecture for long BCH codes显示文摘	CHEN Yan-ni PARHI K K	2004	IEEE Trans on very large scale integration (VLSI) systems2004，，：	1
16	Area-efficient High-speed Decoding Schemes for Turbo Decoders显示文摘	Wang Z Chi Z Parhi K K	2002	IEEE Trans on VLSI Systems2002，10，6：	1
17	A survey of design techniques for system 显示文摘	BENINI L BOGLILO A MICHELI G	2000	IEEE Trans on VLSI systems2000，8，3：	1
18	Embedded power supply for low-power DSP显示文摘	Gutnik V Chandrakasan A P	1997	IEEE Trans VLSI Systems1997，4，：	1
19	Circuit and microarchitectura] techniques for reducing cache leakage power 显示文摘	N S Kim K Flautner D BBlaauw	2004	IEEE Trans on VLSI Systems2004，12，2：	1
20	Low power design using double edge triggered flip-flops显示文摘	WRONSKI L D ALBICKI A	1994	IEEE Trans VLSI Systems1994，2，2：	1

返回顶部每页显示：

共9页首页上一页第1页下一页末页 /9 跳转

互联网出版许可证新出网证(渝)字10号全国400电话 - 免长途话费

用户提示