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	题名	作者	年代	出处	被引量
1	Synthesis of one-dimensional linear hybrid Cellular Autornata显示文摘		1996	IEEE Trans CAD1996，15，3：	1
2	Estimation of Power Dissipation Using a Novel Power Macromodeling Technique显示文摘	Chen Z Roy K Chong E K	2000	IEEE Tran CAD of Integrated Circuits and Systems2000，19，11：	1
3	FastCap: A multiple accelerated 3-D capacitance extraction program 显示文摘	Nabors K White J	1991	IEEE Trans CAD of Integr Circ and Syst1991，10，11：	1
4	COMPACTEST: A Method to Generate Compact Test Set for Combinational Circuits显示文摘	I Pomeranz L N Reddy S M Reddy	1993	IEEE Trans on CAD of Integrated Circuits and Systems1993，12，7：	1
5	East and accurate timing characterization using functional information显示文摘	YALCIN H MORTAZAVI M PALERMO R C	2000	IEEE Trans CAD2000，20，2：	1
6	Hierarehical Steiner Tree Construction in Uniform Orientations显示文摘	Sarrafzadeh M Wong C K	1992	IEEE Trans CAD1992，11，9：	1
7	Theoretical fundamentals of gate level information flow tracking显示文摘	Wei Hu Jason Oberg	2011	IEEE trans on CAD2011，30，8：	1
8	Testing SoC interconnects for signal integrity using extended JTAG architecture显示文摘	Mohammad HT Nisar Ahmed Mehrdad Nourani	2004	IEEE Trans CAD of IC and Syst2004，23，5：	1
9	Register binding-based RTL power management for control-flow intensive designs显示文摘	Luo J Zhong L Fei Y	2004	IEEE Trans CAD2004，23，8：	1
10	Compact models for mem?ristors based on charge-flux constitutive relationships显示文摘	Shin S Kim K Kang S M	2010	IEEE Trans on CAD Int Circ Syst2010，29，4：	1
11	Full chip routing optimization with RLC crosstalk budgeting显示文摘	Xiong J J He L	2004	IEEE Trans on CAD of integrated circuits and systems2004，23，3：	1
12	High-level DSP synthesis using concurrent transformations, scheduling, and allocation 显示文摘	Wang Ching-Yi Parhi Keshag K	1995	IEEE Trans on CAD of Integrated CAS1995，14，3：	1
13	Transformation-based method for loop folding 显示文摘	Lee Tsing-Fa Allen C H	1994	IEEE Trans on CAD of Integrated CAS1994，13，4：	1
14	On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Ssurface Methodology显示文摘	Harish B P Bhat N Patil M B	2007	IEEE Trans on CAD2007，，26：	1
15	Rotation scheduling: A loop pipelining al gorithm 显示文摘	Chao Liang Fang LaPaugh Andrea S Sba Edwin Hs-ing-Mean	1997	IEEE Trans on CAD of Integrated CAS1997，16，3：	1
16	Optimal phase conflict removal for layout of dark field alternating phase shifting masks显示文摘	BERMAN P KAHNG A B VIDHANI D	2000	IEEE Trans CAD Integr Circ and Syst2000，19，2：	1
17	An efficient test vector compression scheme using selective Huffinan coding显示文摘	Jas A Ghosh-Dastidar J Ng M E	2003	IEEE Trans on CAD of Integrated Circuits and Systems2003，22，6：	1
18	Fastcap:A multipole accelerated 3-D capacitance extraction program显示文摘	White J	1991	IEEE Trans on CAD of Integrated Circuits and Systems1991，10，10：	1
19	Algorithms for transient three-dimensional mixed-level circuit and device simulation显示文摘	Mayaram K Chern J H Yang P	1993	IEEE Trans CAD of Integrated Circuits arid Systems1993，12，11：	1
20	Closing the gap : near-optimal Steiner trees in polynomial time 显示文摘	GRIFFITH J	1994	IEEE Trans on CAD1994，13，11：	1

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