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58篇 您的检索式：期刊名="IEEE Journal SolidState Circuits"

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	题名	作者	年代	出处	被引量
1	A low-power reconfigurable analog-to-digital converter显示文摘	Gulati K Lee H S	2001	IEEE Journal of Solidstate Circuits2001，36，12：	1
2	Full-speed testing of A/D converters显示文摘	Doernberg Lee H S Hodges D	1984	IEEE Journal of Solidstate Circuits1984，19，6：	1
3	CMOS active pixel image sensors for highly integrated imaging systems 显示文摘	SUNETRA K M SABRINA E K RUSSELL C G	1997	IEEE Journal of Solidstate Circuits1997，32，2：	1
4	A 167-Processor computational platform in 65 nm CMOS显示文摘	TRUONG D N CHENG W H MOHSENIN T	2009	SolidState Circuits IEEE Journal of2009，44，4：	1
5	High Q inductors for wireless applications in a complementary silicon bipolar process 显示文摘	Ashby K B Koullias I A Finley W C	1996	IEEE Journal of SolidState Circuits1996，31，1：	1
6	A 16 bit oversampling A/D conversion technology using triple integration noise shaping 显示文摘	Matsuya Y Uchimura K Iwata A	1987	IEEE Journal SolidState Circuits1987，22，12：	1
7	On chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved voltage Multiplier Technique显示文摘		1976	IEEE JOURNAL OF SOLIDSTATE CIRCUITS1976，，：	1
8	An improved frequency compensation technique for CMOS operational amplifiers显示文摘	Ahuja B K	1983	IEEE Journal of SolidState Circuits1983，18，6：	1
9	Error correction techniques for high-performance differential A/D converters显示文摘	Khen-Sang Tan Sami Kiriaki Michiel De Wit	1990	IEEE Journal of SolidState Circuits1990，25，6：	1
10	A 30 MHz CMOS voltage-controlled ring oscillator 显示文摘	Anam S K Abidi A A	1990	IEEE Journal of Solidstate Circuits1990，25，1：	1
11	A high-efficiency CMOS voltage doubler 显示文摘	Favrat P Deval P Declercq M J	1998	IEEE Journal of Solidstate Circuits1998，33，3：	1
12	An analog PLL-based clock and data recovery circuit with high input jitter tolerance显示文摘	SUN S Y	1989	IEEE Journal of SolidState Circuits1989，24，2：	1
13	Digital compatible high performance operational amplifier with rail-torail input and output ranges显示文摘	Wu W C S Helms W J Kuhn J A at al	1994	IEEE Journal of SolidState Circuits1994，29，1：	1
14	Analysis of temporal noise in CMOS photodiode active pixel sensor 显示文摘	Tian H Fowler B Gamal A E	2001	IEEE Journal of SolidState Circuit2001，36，1：	1
15	A lowpower DCVSL-like GIDL-free voltage driver for low-cost RFID nonvolatile memory显示文摘	DAGAN H TEMAN A PIKHAY E	2013	IEEE Journal of SolidState Circuits2013，48，6：	1
16	Metallization for integrated circuits using a lift-off technique显示文摘	WIDMANN D W	1976	IEEE Journal of SolidState Circuits1976，11，4：	1
17	A 2-1600-MHz CMOS clock recovery PLL with low-Vdd capability显示文摘	Larsson P	1999	IEEE Journal on Solidstate Circuits1999，34，12：	1
18	An ultra low energy 12-bit rate-resolution scalable SAR ADC for wireless sensor nodes显示文摘	Naveen Verma Anantha P Chandrakasan	2007	IEEE Journal of Solidstate Circuits2007，42，6：	1
19	A semidigital dual delay-locked loop显示文摘	SIDIROPOULOS S HOROWITZ M A	1997	IEEE Journal of SolidState Circuits1997，32，11：	1
20	A Low-Noise Low-Offset Capacitive Sensing Amplifier for a 50-μg/√Hz Monolithic CMOS MEMS Accelerometer显示文摘	Jiangfeng Wu Gary K Fedder L Richnard Carley	2004	IEEE Journal of SolidState Circuits2004，39，5：	1

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