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	题名	作者	年代	出处	被引量
1	Design verification via simulation and Automatic test pattern generation显示文摘	ASAAD H HAYES J	1995	IEEE ICCAD1995，，：	1
2	Datapath synthesis using a problem space genetic algorithm 显示文摘	DHODHI M HIELSCHER F	1995	IEEE Trans ICCAD1995，14，：	1
3	Activity Driven Clock Design for Low Power Circuits显示文摘	Tellez G E Farrah A Sarrafzadeh M	1995	Proc IEEE ICCAD1995，11，：	1
4	Coupling-Aware High-Level Interconnect Synthesis for Low Power显示文摘	Lyuh Chun-Gi Kim Taewhan Kim Ki-Wook	2002	ICCAD2002，，：	1
5	Fredkin/Toffoli templates for reversible logic synthesis显示文摘	Maslov D Dueck G W Miller D M	2003	ICCAD2003，913，：	1
6	Automated synthesis of data paths in digital systems显示文摘	Tseng C J Siewiorek D P	1986	IEEE Trans ICCAD1986，5，3：	1
7	Simultaneous functional-unit binding and floorplanning 显示文摘	D F Wong	1994	IEEE Trans ICCAD1994，11，：	1
8	A global floorplanning approach for VLSI design 显示文摘	S W Director	1986	IEEE Trans on ICCAD1986，11，：	1
9	Simultaneous functional unit binding and floorplanning显示文摘	Fang Y M Wong D F	1994	IEEE Trans ICCAD1994，，6：	1
10	Compact Vector Generation for Accurate Power Simulation显示文摘	Huang Shi-Yu Chen vKuang-Chien Cheng Kwang-Ting	1992	Proceedings of ICCAD1992，47，：	1
11	Time Domain Current Waveform Simulation of CMOS Circuits显示文摘	Deng A C Shiau Y C Loh K H	1988	Proceedings of ICCAD1988，30，：	1
12	Datapath synthesis using a problem space genetic algorithm显示文摘	Dhodhi M Hielscher F	1995	IEEE Trans ICCAD1995，14，：	1
13	Exploiting STI Stress for Performance 显示文摘	Kahng A B Sharma P Topaloglu R O	2007	ICCAD2007，，：	1
14	Return-limited Inductance:A Practical Approach to On-Chip Inductance Extraction显示文摘	SHEPARD K L TIAN Z	2000	IEEE Transaction on ICCAD2000，19，4：	1
15	Modeling of Iayout-Dependent Stress Effect in CMOS Design显示文摘	Wang Chi-Chao Zhao Wei Liu F	2009	ICCAD2009，，：	1
16	Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits 显示文摘	Kajihara S Pomeranz I Kinoshita K Reddy S M	1995	ICCAD1995，14，12：	1
17	Test set compaction for combinational circuits 显示文摘	Jau-Shien Chang Chen-Shang Lin	1995	ICCAD1995，14，11：	1
18	Retarded models for PC board interconnections-or how the speed of light affects your SPICE circuit simulation显示文摘	HEEB H RUEHLI A	1991	Proc IEEE ICCAD1991，，91：	1
19	An efficient test vector compression scheme using selective Huffman coding 显示文摘	Jas A Ghosh-Dastidar J Mom-Eng Ng	2003	ICCAD2003，22，6：	1
20	Improved Logic Synthesis Algorithms for TableLook Up Architectures显示文摘	R Murgai	1991	ICCAD1991，，：	1

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