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| 1 | Effect of Sintering on Grain Boundary Microstructure and Electrical Properties of CaCu_3Ti_4O_(12) Ceramics显示文摘CaCu3Ti4O12 ceramic with a giant dielectric constant was synthesized by sol-gel method and sintered in three different sintering conditions: 1 035 ℃ for 48 h, 1 080 ℃ for 3 h and 48 h. The phase of the ceramics, the element distribution, the valance state of Ti ions at grain boundaries, and the electrical properties were characterized via X-ray diffraction(XRD), energy dispersive X-ray analysis(EDAX), X-ray photoelectron spectroscopy(XPS), electrical conduction and dielectric measurement. The results demonstrate that the grain-boundary microstructure and the electrical properties are influenced by sintering conditions: 1 By raising sintering temperature, the Cu-rich and Ti-poor grain boundary was formed and grain resistivity was decreased. 2 By prolonging sintering time, the content of Ti3+ near the grain boundary increased, leading to the decrease of the grain-boundary resistivity and the increase of the activation energy at grain boundary. The ceramic, sintering at 1 080 ℃ for 48 h, exhibited a small grain resistivity(60.5 *cm), a large grain-boundary activation energy(0.42 e V), and a significantly enhanced dielectric constant(close to 1×105 at a low frequency of 1×103 Hz). The results of electrical properties accord with the internal boundary layer capacitor model for explaining the giant dielectric constant observed in Ca Cu3Ti4O12 ceramics. | YANG Zhi XIONG Rui | 2015 | Wuhan University Journal of Natural Sciences2015，20，3： | 0 |
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