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您的检索式:作者名="Senior Member,CCF"
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| 1 | Global-to-Local Approach to Rigorously Developing Distributed System with Exception Handling显示文摘Cooperative distributed system covers a wide range of applications such as the systems for industrial controlling and business-to-business trading, which are usually safety-critical. Coordinated exception handling (CEH) refers to exception handling in the cooperative distributed systems, where exceptions raised on a peer should be dealt with by all relevant peers in a consistent manner. Some CEH algorithms have been proposed. A crucial problem in using these algorithms is how to develop the peers which are guaranteed coherent in both normal execution and exceptional execution. Straightforward testing or model checking is very expensive. In this paper, we propose an e?ective way to rigorously develop the systems with correct CEH behavior. Firstly, we formalize the CEH algorithm by proposing a Peer Process Language to precisely describe the distributed systems and their operational semantics. Then we dig out a set of syntactic conditions, and prove its su?ciency for system coherence. Finally, we propose a global-to-local approach, including a language describing the distributed systems from a global perspective and a projection algorithm, for developing the systems. Given a well-formed global description, a set of peers can be generated automatically. We prove the system composed of these peers satisfies the conditions, that is, it is always coherent and correct for CEH. | 蔡超 裘宗燕 Senior Member, Member, CCF, IEEE 杨红丽 赵翔鹏 | 2009 | Journal of Computer Science & Technology2009,24,2: | 3 |
| 2 | CCNoC:Cache-Coherent Network on Chip for Chip Multiprocessors显示文摘As the number of cores in chip multiprocessors(CMPs) increases,cache coherence protocol has become a key issue in integration of chip multiprocessors.Supporting cache coherence protocol in large chip multiprocessors still faces three hurdles:design complexity,performance and scalability.This paper proposes Cache Coherent Network on Chip(CCNoC),a scheme that decouples cache coherency maintenance from processors and shared L2 caches and implements it completely in network on chip to free up processors and shared L2 caches from the chore of maintaining coherency,thereby reduces design complexity of CMPs.In this way,CCNoC also improves the performance of cache coherence protocol through reducing directory access latency and enhances scalability by avoiding massive directories overhead in shared L2 caches.In CCNoC, coherence state caches and active directory caches are implemented in the network interface components of network on chip to maintain cache coherence states for blocks in L1 caches and manage directory information for recently accessed blocks in L2 caches respectively.CCNoC provides a scalable CMP framework to tackle cache coherency which is the foundation of CMP.This paper evaluates the performance of CCNoC.Experimental results show that for a 16-core system,CCNoC improves performance by 3%on average over the conventional chip multiprocessor and by 10%at best,while reduces storage overhead by 1.8%and saves directory storage by 88%,showing good scalability. | 王惊雷 薛一波 Member, CCF, IEEE 王海霞 李崇民 汪东升 Senior Member,CCF | 2010 | Journal of Computer Science & Technology2010,25,2: | 1 |
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